In the fabrication of semiconductor devices multiple layers may be required for providing a multi-layered interconnect structure. During the manufacture of integrated circuits it is common to place material photoresist on top of a semiconductor wafer in desired patterns and to etch away or otherwise remove surrounding material not covered by the resist pattern in order to produce metal conductor runs or other desired features. During the formation of semiconductor devices it is often required that the conductive layers be interconnected through holes in an insulating layer. Such holes are commonly referred to as contact holes, i.e., when the hole extends through an insulating layer to an active device area, or vias, i.e., when the hole extends through an insulating layer between two conductive layers. The profile of a hole is of particular importance since that it exhibits specific electrical characteristics when the contact hole or via is filled with a conductive material. In addition, metal interconnect lines may be formed by selectively anisotropically etching away areas (gaps) in a layer of metal to leave metal interconnect lines which are subsequently covered with a layer of dielectric insulating material to fill the gaps.
In anisotropic etching processes, such as those using halocarbon containing plasmas, polymer deposition on the sidewalls and bottom surface of the feature being etched occurs simultaneously with the etching of the oxide or the metal, as the case may be. Surfaces struck by the ions at a lower rate tend to remove the nonvolatile polymeric residual layer at a lower rate, thereby at steady state, leaving a layer of nonvolatile polymeric or metal-polymeric residue on surfaces such as the sidewalls of the etched features, thereby protecting such surfaces against etching by the reactive gas. As such, etching is performed preferentially in a direction perpendicular to the wafer surface since the bottom surfaces etch at a higher rate than the polymeric residue containing sidewalls (i.e., anisotropic etching). If metal is being etched, for example, in etching metal lines, metal will simultaneously deposit with the polymer thus forming a metal-polymer residue on the sidewalls of the etched opening.
In a typical process, for example, an overlying photoresist layer is photolithographically patterned to anisotropically etch the semiconductor features in an underlying layer, for example a metal layer for metal interconnect line etching or an insulating dielectric layer for etching damascene features such as vias or contact holes. After the features are etched, the photoresist mask which remains overlying the upper surface of the etched features may be removed by a dry etching method known as a reactive ion etch (RIE) or ashing process in a quartz chamber using a plasma of O2 or a combination of CF4 and O2 to react with the photoresist material.
It has been the practice in the art to remove at least a portion of the photoresist in-situ by an ashing process following an etching procedure where metal is exposed, for instance after anisotropically etching the metal conductive layer, since exposure of the metal to atmospheric conditions can cause metallic corrosion. In such an in-situ ashing process, the photoresist removal may take place by a reactive ion etching (RIE) method using an oxygen containing plasma in a stripper chamber module of a metal etcher such as, for example, the LAM TCP 9600 DSQ Stripper Chamber. The LAM Research TCP 9600 single wafer metal etcher is an example of a state-of-the-art single wafer RIE or plasma etch tool for etching metal conductor patterns. The Stripper Chamber is just one module in a series of modules included a metal etching apparatus as in, for example, the LAM TCP 9600.
A processing difficulty arises, however, when a metal-polymer residue forms upon etching a semiconductor feature. In a typical etching process, for example, in etching via openings, etching takes place through the inter-metal dielectric (IMD) layer to expose an underlying metallic contact. Typically the metallic portion is over etched to assure adequate contact of the via opening (which will later be filled with a metallic material) with the underlying metal contact layer. As a result, during the etching process, a metal-polymer residue is formed on the sidewalls of an etched opening that cannot be removed by the reactive ion etching (RIE) or ashing process.
Further, the RIE ashing process to remove the overlying photoresist may tend to oxidize the metal-polymer residue formed on the sidewalls of an etched opening thereby making it even more resistant to an RIE cleaning process. As a result, the metal-polymer residue formed on the sidewalls of an etched opening cannot be successfully removed by an RIE process and must be removed by an ex-situ wet process. It has been found necessary in the art to remove the process wafers from the metal etcher, to subject the process wafers with the metal-polymer residue to a wet polymer strip process (PRS) to remove the metal-polymer residue.
FIG. 1A shows a typical wet polymer strip process (PRS) bench configuration 100. In a typical wet chemical polymer stripping process, wafers in a typical process are transferred for processing at one or more wet chemical bunch process lines. In an exemplary process, for example, a first wet, chemical bench process line shown in FIG. 1A includes immersing the process wafers in a plasma etching cleaning solution at one or more stations e.g., 102A, 102B, using for example, ACT available from Ashland Chemical composed of DMSO (Dimethyl-sulphur-oxide), MHA (Mono-Ethyl-Amine) and catechol typically provided at an elevated temperature (e.g., ACT690C™). The process waters are then typically immersed in a native oxide etching solution (NOE) typically composed at hydrogen fluoride (HF), ammonium fluoride (NH4F), and deionized water at station 104A followed by a QDR (quick dump rinse) in deionized water at station 106, a soak in deionized water at one or more pool stations e.q., 108, and finally transferred to a water drying station 110.
Referring to FIG. 1B, in a second typical process the wafers are transferred to a second wet chemical bench line process 112 involving the same series of cleaning steps and chemicals except that a neutralizing solution of n-methyl pyrrolidone (NMP) at station 104B as shown in FIG. 1B replaces the NOE solution at 104A in FIG. 1A.
One problem with the prior art wet chemical polymer stripping process is that the neutralizing solution NMP which helps prevent corrosion to the metal containing semiconductor features has an anti-corrosive action limited to about 12 hours. Additionally, the fluorine containing NOE solution may tend to cause etching damage to semiconductor features, for example, via sidewalls. Moreover, the costs of both the NMP and NOE solutions are relatively high with an increased cost due to the environmental protection procedures associated with the use of the fluorine containing NOE solution including fluorine recovery procedures. A further shortcoming is that the NOE treatment may frequently cause damage to the metal containing portions of the process wafer due to insolubility of the ACT solution leading to localized preferential etching.
There is therefore a need in the semiconductor processing art to develop an improved wet chemical polymer stripping method whereby polymer residues may be more cost effectively removed with minimal damage to semiconductor features.
It is therefore an object of the invention to provide an improved wet chemical polymer stripping method whereby polymer residues may be more cost effectively removed with minimal damage to semiconductor features while overcoming other shortcomings and deficiencies in the prior art.